Pooja Krishnamurthy Revankar, Dr. H. C. Hadimani, Dr. Udara Yedukondalu. (2022). Design and Implementation of 64 bit High Speed Floating Point Multiplier for DSP Applications. Mathematical Statistician and Engineering Applications, 71(3), 767 –. https://doi.org/10.17762/msea.v71i3.216