Adiabatic Logic Gates using Wireless Charging

Authors

  • Bharti Jogi, Aadesh Varude, Ankit Bhurane, Ashwin Kothari

DOI:

https://doi.org/10.17762/msea.v71i4.1210

Abstract

Adiabatic logic is the energy-efficient way of de- signing logic gates. The logic families like positive feedback adiabatic logic (PFAL), complementary pass-transistor logic (CPAL), and energy-efficient secure positive feedback adiabatic logic (EESPFAL) are used to design logic gates. The circuit using this logic has the potential in detecting hardware trojans (HT) using the power analysis method for detection. HT has become a major concern for the security of IoT devices. In recent times, the trend for wireless devices has increased and so has the threat. This motivates to development of wireless logic gates with low power consumption to secure the IoT devices. We propose a wireless powered adiabatic logic gate design. A practical wireless charging adiabatic circuit is demonstrated using LTSPICE simulation software. The circuit offers similar performance with the convenience of wireless connectivity.

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Published

2022-11-18

How to Cite

Bharti Jogi, Aadesh Varude, Ankit Bhurane, Ashwin Kothari. (2022). Adiabatic Logic Gates using Wireless Charging. Mathematical Statistician and Engineering Applications, 71(4), 6133–6143. https://doi.org/10.17762/msea.v71i4.1210

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Section

Articles